Collector to Base Bias Circuit using PNP Transistor

Collector to Base Bias Circuit:

The Collector to Base Bias Circuit shown in Fig. 5-17(a) has the base resistor (R_B) connected between the transistor collector and base terminals. As will be demonstrated, this circuit has significantly improved bias stability for h_FE changes compared to base bias.

Refer to Fig. 5-17(b) and note that the voltage across R_B is dependent on V_CE,

Also, V_CE is dependent on the level of I_C and I_B,

If I_C increases above the design level, there is an increased voltage drop across R_C, resulting in a reduction in V_CE. The reduced V_CE level causes I_B to be lower than its design level, and because I_C = h_EE I_B, the collector current is also reduced. Thus, an increase in I_C produces a feedback effect that tends to return I_C toward its original level. Similarly, a reduction in I_C produces an increase in V_CE which increases I_B, thus tending to increase I_C back to its original level.

Analysis of this circuit is a little more complicated than base bias analysis. To simplify the process, an equation is first derived for the base current. Substituting for V_CE from Eq. 5-4 into Eq. 5-5,

Substituting I_C =h_FE I_B (from Eq. 5-3) into the above equation

This gives,

Effect of h_FE(max)and h_FE(min)

As discussed for the base bias circuit, transistors of a given type number have a wide range of h_FE values, (h_FE spread). This affects the current and voltage levels in all bias circuits. In the Collector to Base Bias Circuit Theory, the feedback from the collector to the base reduces the effects of h_FE spread.

It is important to note that, unlike the situation in a base bias circuit, the base current in a collector to base bias circuit does NOT remain constant when the transistor h_FE value is changed.

Collector to Base Bias Using a PNP Transistor:

A Collector to Base Bias Circuit Theory using a pnp transistor is illustrated in Fig. 5-21. Note that the voltage polarities and current directions are reversed compared to npn transistor collector to base bias circuit. This circuit can be analysed in exactly the same way as the npn transistor circuit.