Common Drain JFET Amplifier or Source Follower:

In the Common Drain JFET Amplifier circuit (also called the source follower), the output voltage is developed across source resistor R_S. External load resistor R_L is connected to FET source terminal S through coupling capacitor C₂, and gate bias voltage V_G is derived from V_DD by means of potential divider R₁ and R₂. No resistor is connected in series with the drain terminal, and no source bypass capacitor is used. The input signal is applied to the gate through coupling capacitor C₁.

For understanding the operation of the common drain circuit, note that gate voltage V_G is a constant quantity, as in any potential divider bias circuit. When a signal is applied to the FET gate through C₁, gate voltage increases and decreases as the input signal goes positive and negative respectively.

Also V_gs remains substantially constant, therefore, the source voltage V_s increases or decreases with the increase or decrease in gate voltage. Since the FET source is the output terminal, it is seen that the output voltage from a common drain circuit is approximately the same as the input voltage. Thus, the common drain circuit can be said to have approximately unity gain. Because the output voltage at the FET source terminal follows variations in the signal voltage applied to the gate, the common drain circuit is also known as a source follower.

The Common Drain JFET Amplifier ac equivalent circuit is shown in Fig. 13.51. The current generator is g_mV_gs where V_gs = V_in – V_out. Moreover R_G = R₁ || R₂.

Voltage gain

Normally r_d ≫ R_S || R_L

If g_m (R_S || R_L) ≫ 1 then A_v ≈ 1

So value of voltage gain becomes approximately equal to unity (slightly less than unity).

Input Impedance: The circuit input impedance is R_G = R₁ || R₂.

Output Impedance: In a Source Follower circuit, any variation in output voltage V_out affects upon the gate-source voltage V_gs and V_gs is given as

Normally R_gs ≫ R_s || R_G, so V_gs = V_out

and

Also

Actually, r_d is in parallel with 1/g_m, but since r_d ≫ 1/g_m, it is neglected. R_s is the output impedance of the device. The circuit output impedane