FET Amplification:

Consider the n-channel FET Amplification circuit in Fig. 9-26. Note that drain-source terminals are provided with a dc supply (V_DD), connected via the drain resistor (R₁). The gate-source junctions are reverse-biased by the gate voltage (V_G). An ac signal generator (with voltage v_f) is connected in series with the gate terminal. As already discussed, field effect transistors are voltage-operated devices. The drain current is controlled by the gate-source voltage. A change in gate-source voltage (ΔV_GS) produces a change in drain current (ΔI_D), and this causes a variation in the voltage drop across the resistor connected in series with the drain terminal.

Suppose that, for the circuit in Fig. 9-26, V_DD = 20 V, R₁ = 6 kΩ, and V_G is adjusted to give I_D = 2 mA. Also, assume that the FET has a forward transfer admittance of Y_fs = 4000 μS. The dc level of the drain voltage is,

Now assume that the instantaneous level of v_i is +50 mV. This produces an increase,

The new level of drain voltage is,

So, V_D changed from 8 V to 6.8 V when the ac input increased from zero to 50 mV.

When the instantaneous level of v_i is -50 mV,

This gives a new drain voltage,

It is seen that an ac input of v_i = ±50 mV produces an output voltage change at the FET drain terminal of ΔV_D = ±1.2 V. This can be stated as an ac output voltage of v_o = ±1.2 V.

The circuit voltage amplification is,