Two Stage Direct Coupled Common Emitter Amplifier:

Figure 12-23 shows Two Stage Direct Coupled Common Emitter Amplifier. This time the second stage is a common collector circuit, or emitter follower. Stage 2 gives the circuit a very low output impedance, but has unity voltage gain Stage 1 still has substantial voltage gain.

The design procedure for this circuit is similar to the procedures already discussed. As with the circuit in Fig. 12-20, the Q₂ base bias voltage is the collector voltage of Q₁. A suitable level of emitter current I_E2 is selected, and R_E is calculated to be (V_B2 – V_BE)/I_E2. Coupling capacitor C₁ is once again calculated from X_C1 = Z_i/10.

The load resistor (R_L) may be relatively small, which means that coupling capacitor C₃ must be large. Therefore, both C₂ and C₃ are used to determine the low 3 dB frequency of the circuit by using the 0.65 factor employed in Eq. 12-14.

It is important to realize that the emitter follower in Fig. 12-23 is a small-signal circuit. In fact, this type of circuit functions best when the amplitude of the at output voltage is much smaller than the dc base-emitter voltage of the output transistor (V_BE). With at output voltages that approach or exceed V_B2, the base-emitter junction of Q₂ might become reverse biased when the output voltage moves rapidly in a negative direction. In this case, the circuit will not function correctly. Where large output voltages and low output impedance are required, a complementary emitter follower is used.

With the second stage operating as a small-signal emitter follower, resistor R₅ in Fig. 12-23 does not have to be very much smaller than external load R_L. However, for satisfactory operation, Q₂ emitter current (I_E2) should be greater than the peak ac load current (i_p). The peak output current is calculated by dividing the desired peak output voltage v_p, by the load resistance; i_p = v_p/R_L.